Neo Geo+ replica: Plaion and SNK partnership rekindles debate over FPGA, ASIC and accuracy

Plaion's Neo Geo+ replica has thrust the classic SNK hardware back into the spotlight, prompting technical debate over how best to reproduce the original Neo Geo AES experience.

The Neo Geo AES first launched in 1990 and remains a touchstone for collectors and retro players.

Plaion has publicly described the Neo Geo+ as a hardware-first recreation, saying it will avoid software emulation and instead rely on newly manufactured chips based on the originals to reproduce the console's behavior.

Plaion told the publication Time Extension that the Neo Geo+ will natively play game software from both new and legacy cartridges, characterizing the project as a true hardware reincarnation rather than emulation or FPGA approximation.

The company has framed the approach as aiming for an authentic retro gaming experience by re-engineering original designs to modern manufacturing standards.

Reports from the retro hardware community indicate that FPGA specialists Jotego and Furrtek are involved with the Neo Geo+ chips in some capacity, although Plaion has not formally confirmed the specific roles of either group.

Both Jotego and Furrtek are well known among retro enthusiasts for technical contributions to hardware re-creation and preservation efforts.

One notable voice in the conversation was Furrtek, which in a now-deleted social media post described the Neo Geo+ as, in their view, having the potential to be the most faithful hardware recreation since SNK exited console manufacturing.

Furrtek added that the machine may not be perfect, but it demonstrates an ambition to outperform emulation and to honor the brand and its fans.

Furrtek is credited within the community for projects including the Neo CD SD Loader and the Fusion Converter, tools that facilitate running various Neo Geo formats on original hardware.

Not all experts are persuaded.

FPGA developer Pramod Somashekar cautioned that the reported approach could amount to splitting an FPGA design across fixed ASICs, which he characterized as a bait-and-switch relative to an open, reconfigurable FPGA solution.

He also warned that ASIC-based designs are fixed at manufacture and cannot be dynamically reconfigured in the way FPGA implementations can, limiting the ability to issue post-launch updates or corrections.

The Neo Geo+ story highlights a broader tension in retro hardware reproduction between faithful silicon-level recreation and the flexibility of FPGA-based cores such as MiSTer.

As Plaion advances its project, community scrutiny will continue to focus on technical transparency, the role of specialist partners, and whether the final product meets the expectations of retro collectors and preservationists.

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